Patents

International

Self-Repairing Fault-Tolerant FPGA Computation Unit and Architecture

Inventor: Hasan Baig and Jeong-A Lee.

US Patent 9720766.
Issued on August 01, 2017.

Domestic

Bio-inspired Fault-Tolerant FPGA Computation Cell

Inventor: Hasan Baig and Jeong-A Lee.

Korea Registration Number: 101279999.

Issued on June 24, 2013.

Self-Repairing Bio-inspored Fault-tolerant FPGA

Inventor: Hasan Baig and Jeong-A Lee

Korea Registration Number: 101400809.

Issued on May 22, 2014.

Research Publications

Dissertations

PhD (Computer Science - worked on Genetic Design Automation)
Title: Methods and Tools for the Analysis, Verification and Synthesis of Genetic Logic Circuits. 

Download here.


MS (Computer Engineering - worked on embedded systems)

Title: A Self-Repairing Bio-Inspired Fault-Tolerant FPGA Architecture. 

Download here.


BE (Electronic Engineering - worked on embedded systems)

Title: Development and Verification of Soft IP Core of USB 3.0 in Verilog HDL. 

Note: This was a group project of four students (including me) in which my contributions are the development of PHY/MAC layer controller and Master controller of USB 3.0 device

Download here.

International Journals

  1. Hasan Baig and Jan Madsen, "GeneTech - A Technology Mapping Tool for Genetic Logic Circuits". (submitted to IEEE Transactions on Biomedical Engineering).
  2. Hasan Baig and Jan Madsen, "An Automated Approach to Verify the Logic of Genetic Circuits from Experimental Data", (submitted to ACM Journal on Emerging Technologies).
  3. Hasan Baig and Jan Madsen, "Simulation Approach for Timing Analysis of Genetic Logic Circuits", ACS Synthetic Biology, January 19, 2017. 
  4. Hasan Baig and Jan Madsen, "D-VASim - An Interactive Virtual Laboratory Environment for the Simulation and Analysis of Genetic Circuits", Bioinformatics, September 11, 2016.
  5. Hasan Baig, Jeong-A Lee and Zahid Ali Siddiqui, "A Low-overhead Multiple-SEU Mitigation Approach for SRAM-based FPGAs with Increased Reliability", IEEE Transactions on Nuclear Sciences, Vol. 61, Issue 3, pp 1389-1399, May 14 2014.
  6. Hasan Baig, Muhammad Asrar Alam and Jeong-A Lee, "Integrated LTSSM (Link Training & Status State Machine) and MAC Layer of USB 3.0 Device for Reliable SuperSpeed Data Transactions", Research Notes in Information Sciences (RNIS), Vol. 9, pp. 37-47, ISSN 2093-1956, May 2012.
  7. Hasan Baig and Jeong-A Lee, "Architectural Development and Functional Verification of SuperSpeed USB 3.0 PHY Layer Controller", Journal of Computing,  Vol. 3, Issue 5, pp. 1-12, ISSN 2151-9617, May 2011.

      International Conferences and Workshops

      1. Hasan Baig and Jan Madsen, "Taming Living Logic using Formal Methods", Models, Algorithms, Logics and Tools, Lecture Notes in Computer Science, vol. 10460, Springer, 2017.
      2. Hasan Baig and Jan Madsen, "A Top-down Approach to Genetic Circuit Synthesis and Optimized Technology Mapping", 9th International Workshop on Bio Design Automation (IWBDA), pp. 28-29, 2017.
      3. Hasan Baig and Jan Madsen, "Logic Analysis and Verification of n-input Genetic Logic Circuits", Design Automation and Test in Europe (DATE), March 27-31, 2017.
      4. Hasan Baig and Jan Madsen, "Logic and Timing Analysis of Genetic Logic Circuits using D-VASim", 8th International Workshop on Bio Design Automation (IWBDA) 2016, Newcastle upon Tyne, UK, August 16-18, 2016.
      5. Hasan Baig and Jan Madsen, "D-VASim: Dynamic Virtual Analyzer and Simulator for Genetic Circuits", 7th International Workshop on Bio-Design Automation (IWBDA) 2015, Seattle Washington, USA, Aug 19-21, 2015.
      6. Hasan Baig and Jeong-A Lee, "An Island-style-routing Compatible Fault-Tolerant FPGA Architecture with Self-Repairing Capabilities", Field Programmable Technology (FPT) 2012, pp 301-304 (ISBN: 978-1-4673-2846-3), Seoul, South Korea, Dec. 10-12, 2012.
      7. Hasan Baig, Jeong-A Lee and Jieun Lee, "Performance Evaluation of CPU-GPU and CPU-only Algorithms for Detecting Defective Tablets through Morphological Imaging Techniques", CISTI 12, IEEE Vol. 2, pp. 1-6 (ISBN: 978-1-4673-2843-2), ISI Web of Knowledge, Vol. 1-2, pp. 568-573 (ISBN: 978-989-96247-6-4), Spain, June 20-23, 2012.
      8. Hasan Baig, Jeong-Gun Lee and Jeong-A Lee, "A Novel Automated Experimental Approach for the Measurement of On-Chip Speed Variations through Dynamic Partial Reconfiguration", Advances in Automation and Robotics, LNEE 123, Vol. 2, pp. 281-290, ISSN: 1876-1100, ISBN: 978-3-642-25645-5, © Springer-Verlag Berlin Heidelberg 2011, Dubai, December 1-2, 2011.
      9. Hasan Baig and Jeong-A Lee, "Implementation and Functional Verification of Soft IP Core of USB 3.0 Device MAC Layer", Proceedings of the International Conference on Embedded Systems and Applications (ESA'11), pp. 158-164, ISBN: 1-60132-178-3, Las Vegas, Nevada, USA, July 18-21, 2011. 
      10. Hasan Baig, M. Mansoor Ikram, Kamran Shamim, Ahmed Taha Akbar and Ahmed Hassan, "Implementation of SCADA System for Unsought Tablets Detection through Morphological Image Processing", 12th IEEE International Multi Topic Conference (IEEE INMIC 2008),  pp. 493-500, ISBN: 978-1-4244-2824-6, December 23-24, 2008. 
      11. Hasan Baig, M. Owais, M. Saleheen Aftab, Kamran Shamim & Hamza Azeem, "GSM Based Security System Using LabVIEW", Proceedings First International Conference on Computer, Control and Communication, PNEC Karachi, November 12-13, 2007.

      Posters and Project Demonstrations

      1. Hasan Baig and Jan Madsen, "Timing Analysis of Genetic Logic Circuits using D-VASim", University Booth at Design Automation and Test in Europe (DATE) 2016, Dresden, Germany, Mar 15-17, 2016.
      2. Hasan Baig and Jan Madsen, "Analysis and Verification of Genetic Logic Circuits using D-VASim", Synthetic and Systems Biology Summer School (SSBSS) 2015, Taormina, Italy, July 5-9, 2015.
      3. Hasan Baig and Jeong-A Lee, "A Self-repairing Bio-inspired Fault-Tolerant FPGA Architecture", 25th ACM SIGDA University Booth and ACM SRC, 49th Design Automation Conference (DAC), San Francisco, USA, Jun 3-7, 2012. 
      4. Hasan Baig and Jeong-A Lee, "A Novel Run-time Auto-Reconfigurable FPGA Architecture for Fast Fault-Recovery with Backward Compatibility", 21st ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Monterey California, February 12, 2013.

      Reports published by industries

      D-VASim: A Software Tool to Simulate and Analyze Genetic Logic Circuits, published by National Instruments and can be seen here. 

      Domestic Magazines 

      Hasan Baig, "Low Cost Fabrication of Highly Reliable Single-Sided PCBs", SPARK, Annual Magazine of Electronic Department, NED University of Engineering & Technology, Karachi, Pakistan, August 2007.