Self-Repairing Fault-Tolerant FPGA Computation Unit and Architecture
Inventor: Hasan Baig and Jeong-A Lee.
US Patent 9720766.
Issued on August 01, 2017.
Bio-inspired Fault-Tolerant FPGA Computation Cell
Inventor: Hasan Baig and Jeong-A Lee.
Korea Registration Number: 101279999.
Issued on June 24, 2013.
Self-Repairing Bio-inspired Fault-tolerant FPGA
Inventor: Hasan Baig and Jeong-A Lee
Korea Registration Number: 101400809.
Issued on May 22, 2014.
Genetic Design Automation: A Practical Approach for the Analysis, Verification and Synthesis of Genetic Logic Circuits
This book is intended for a multidisciplinary audience of computer scientists, engineers and biologists. It provides enough background knowledge for computer scientists and engineers, who usually do not have any background in biology but are interested to get involved in this domain. This book not only presents an accessible basic introduction to molecular biology, it also includes software tools which allow users to perform laboratory experiments in a virtual in-silico environment. This helps newbies to get a quick start in understanding and developing genetic design automation tools.
The third part of this book is particularly useful for biologists who usually find it difficult to grasp programming and are reluctant to developing computer software. They are introduced to the graphical programming language, LabVIEW, from which they can start developing computer programs rapidly. Readers are further provided with small projects which will help them to start developing GDA tools. Chapters are followed by exercises which give readers a hands-on practice with the tools presented. The concepts and algorithms are thoroughly described, enabling readers to improve the tools or use them as a starting point to develop new tools. Both DVASim and GeneTech are available to download from http://bda.compute.dtu.dk/, free of charge.
PhD (Computer Science - worked on Genetic Design Automation)
Title: Methods and Tools for the Analysis, Verification and Synthesis of Genetic Logic Circuits.
MS (Computer Engineering - worked on embedded systems)
Title: A Self-Repairing Bio-Inspired Fault-Tolerant FPGA Architecture.
BE (Electronic Engineering - worked on embedded systems)
Title: Development and Verification of Soft IP Core of USB 3.0 in Verilog HDL.
Note: This was a group project of four students (including me) in which my contributions are the development of PHY/MAC layer controller and Master controller of USB 3.0 device.
- Hasan Baig, Pedro Fontanarrosa, Vishwesh Kulkarni, James McLaughlin, Prashant Vaidyanathan, Chris Myers, et al. "Synthetic Biology Open Language visual (SBOL visual) version 2.2", Journal of Integrative Bioinformatics, June 10, 2020.
- Hasan Baig, Pedro Fontanarrosa, Vishwesh Kulkarni, James McLaughlin, Prashant Vaidyanathan, Chris Myers, et al., "Synthetic Biology Open Language (SBOL) version 3.0.0", Journal of Integrative Bioinformatics, April 2020.
- Sanaullah, Hasan Baig, Jan Madsen, Jeong-A Lee, "A parallel approach to perform threshold value and propagation delay analyses of genetic logic circuit models". (Submitted to ACS Synthetic Biology)
- Hasan Baig and Jan Madsen, "Simulation Approach for Timing Analysis of Genetic Logic Circuits", ACS Synthetic Biology, January 19, 2017.
- Hasan Baig and Jan Madsen, "D-VASim - An Interactive Virtual Laboratory Environment for the Simulation and Analysis of Genetic Circuits", Bioinformatics, September 11, 2016.
- Hasan Baig, Jeong-A Lee and Zahid Ali Siddiqui, "A Low-overhead Multiple-SEU Mitigation Approach for SRAM-based FPGAs with Increased Reliability", IEEE Transactions on Nuclear Sciences, Vol. 61, Issue 3, pp 1389-1399, May 14 2014.
- Hasan Baig, Muhammad Asrar Alam and Jeong-A Lee, "Integrated LTSSM (Link Training & Status State Machine) and MAC Layer of USB 3.0 Device for Reliable SuperSpeed Data Transactions", Research Notes in Information Sciences (RNIS), Vol. 9, pp. 37-47, ISSN 2093-1956, May 2012.
- Hasan Baig and Jeong-A Lee, "Architectural Development and Functional Verification of SuperSpeed USB 3.0 PHY Layer Controller", Journal of Computing, Vol. 3, Issue 5, pp. 1-12, ISSN 2151-9617, May 2011.
- Sanaullah, Hasan Baig, Jeong-A Lee, "Accelerating the Threshold and Timing Analysis of Genetic Logic Circuit Models", 11th IWBDA 2019, Cambridge, England, July 08 - 10, 2019.
- M. Abdullah Siddiqui, Adil Ali Khan, Hasan Baig,