A parallel implementation of the threshold value analysis algorithm (in DVASim) has been proposed which produces the results faster by up to 16 times.
A Self-Repairing bio-Inspired fault-Tolerant FPGA architecture with improved reliability and low area-overhead as compared to previous methodologies.
Experimentation of on-chip speed variations through dynamic partial reconfiguration on two same FPGAs.
Designing and development of a dual-channel NAND flash data storage device.
An cost effective solution to detect and remove defective tablets through an automated process.
I established a Printed Circuit Boards (PCBs) lab at my home where I was able to design and fabricate professional single-sided PCBs.
Worked on multiple projects including development of software and hardware.