<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Trainings | Hasan Baig</title><link>https://www.hasanbaig.com/trainings/</link><atom:link href="https://www.hasanbaig.com/trainings/index.xml" rel="self" type="application/rss+xml"/><description>Trainings</description><generator>Wowchemy (https://wowchemy.com)</generator><language>en-us</language><copyright>© Hasan Baig 2026</copyright><image><url>https://www.hasanbaig.com/images/logo_hu111cd926f59f9282d6ec619eb5e65395_46250_300x300_fit_lanczos_2.png</url><title>Trainings</title><link>https://www.hasanbaig.com/trainings/</link></image><item><title>CSE 1010 (with AI Integration)</title><link>https://www.hasanbaig.com/trainings/uconn-1010-pbl-pypal/</link><pubDate>Tue, 30 Dec 2025 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uconn-1010-pbl-pypal/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: University of Connecticut&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2025, Spring 2026&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>To ensure that students used GenAI effectively rather than dependently, I transformed the course into a project-based learning (PBL) format and developed a custom, course-specific GPT agent named &lt;strong>PyPal (Python Pal)&lt;/strong>. Students were required to seek AI assistance exclusively through PyPal, which was deliberately designed to provide scaffolded guidance, reflective prompts, and conceptual support, rather than complete code solutions. This design discouraged direct solution retrieval from public GenAI tools and promoted authentic engagement with course material.&lt;/p>
&lt;p>Project-based learning was selected to provide students with a purposeful and coherent learning experience, enabling them to immediately apply newly acquired concepts to a real-world problem. Each week, students completed a focused mini-project during class within a 15-minute time window, using guided assistance from GenAI tools. Importantly, these mini-project tasks were intentionally designed so they could not be easily translated into simple prompts for general-purpose GenAI platforms, thereby encouraging problem decomposition, critical thinking, and conceptual reasoning.&lt;/p>
&lt;p>Details of &lt;strong>PyPal&lt;/strong> can be seen &lt;a href="https://www.hasanbaig.com/projects/edtech/aipypal/">here&lt;/a>. The updated lecture slides and recorded video lectures can be accessed from the links given above.&lt;/p>
&lt;!-- Even tried the following way of triggering the javascript function using html component directly. I think the function is now triggering but it is not able to execute ga function from google analytics. I think I am also not putting the google analytics ID at the right place. I will share other files also. --></description></item><item><title>CSE 2050</title><link>https://www.hasanbaig.com/trainings/uconn-2050/</link><pubDate>Fri, 30 Dec 2022 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uconn-2050/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: University of Connecticut&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2022, Spring 2023&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>This course provides an introduction to fundamental data structures and algorithms. The emphasis is on understanding how to efficiently implement different data structures, communicate clearly about design decisions, and understand the relationships among implementations, design decisions, and the four pillars of object-oriented programming: abstraction, encapsulation, inheritance, and polymorphism.&lt;/p>
&lt;p>Lecture slides can be downloaded from the link given above.&lt;/p></description></item><item><title>CSE 3666</title><link>https://www.hasanbaig.com/trainings/uconn-3666/</link><pubDate>Fri, 30 Dec 2022 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uconn-3666/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: University of Connecticut&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2023, 2024, 2025, 2026&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>In this course, students learn basic principles of digital systems and computer architecture. They also learn about RISC architecture, instruction set architecture, assembly language and how to write programs in it. In addition, they learn computer arithmetic, the design/organization of a single-cycle data path and a pipelined RISC processor followed by the memory hierarchy.&lt;/p>
&lt;p>Lecture slides can be downloaded from the link given above.&lt;/p>
&lt;p>This course is very popular and have been accessed across the globe. Following image shows the youtube analytics during the past 365 days.&lt;/p>
&lt;figure id="figure-youtube-analytics-of-the-playlist-between-april-5-2025---april-6-2026">
&lt;a data-fancybox="" href="https://www.hasanbaig.com/trainings/uconn-3666/Analytics_huc5fc4fa6c585608ab3b6348371725bb0_192300_2000x2000_fit_lanczos_2.png" data-caption="Youtube analytics of the playlist between April 5, 2025 - April 6, 2026.">
&lt;img data-src="https://www.hasanbaig.com/trainings/uconn-3666/Analytics_huc5fc4fa6c585608ab3b6348371725bb0_192300_2000x2000_fit_lanczos_2.png" class="lazyload" alt="" width="1448" height="746">
&lt;/a>
&lt;figcaption>
Youtube analytics of the playlist between April 5, 2025 - April 6, 2026.
&lt;/figcaption>
&lt;/figure></description></item><item><title>CSE 1010 (old)</title><link>https://www.hasanbaig.com/trainings/uconn-1010/</link><pubDate>Fri, 30 Dec 2022 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uconn-1010/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: University of Connecticut&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2022, Spring 2023, Summer 2023, Fall 2023, Spring 2024, Summer 2024, Fall 2024, Spring 2025, Summer 2025.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>In CSE 1010, students learn how to solve computing problems using algorithmic thinking, programming, computing logic, processes, and environments. Lab assignments were developed from problems in mathematics, science, and engineering. The contents of this course are prepared using &lt;a href="https://www.zybooks.com" target="_blank" rel="noopener">zyBooks&lt;/a>. In this course, &lt;a href="https://www.python.org" target="_blank" rel="noopener">Python&lt;/a> is used as the main programming language.&lt;/p>
&lt;p>Lecture slides can be downloaded from the link given at the top left.&lt;/p></description></item><item><title>Digital Logic Design Lab</title><link>https://www.hasanbaig.com/trainings/hu-dld-lab-2019/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-dld-lab-2019/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2018, Spring 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>This lab introduces the principle and application of digital devices and systems. Digital Logic Design Laboratory helps students to understand Digital Circuits Analysis. The lab learning process is centered on building these circuits from discrete components and analyzing them. The lab provides the opportunity to design digital circuits using the hardware description language and verify their behavior using computerized circuit simulation methods. Verilog the principle for the design of combinational and sequential digital circuits implemented by using Xilinx Field Programmable Gate Array (FPGA) .The lab learning process is centered on the design flow procedures of (a) design entry, (b) synthesis and Implementation of the design, (c) functional simulation and (d) testing and verification.&lt;/p>
&lt;p>I, being the lead instructor, redesigned the lab components from scratch in Fall 2019 at Habib University. I also developed two softwares to help students perform laboratory experimentation interactively. Both the tools can be downloaded from the link given below.&lt;/p>
&lt;h3 id="about-dld-lab-edtech-software-tools">About DLD Lab EdTech Software Tools&lt;/h3>
&lt;p>During my tenure at Habib University, I taught the course “Computer Architecture (CA)” first and then in later I taught the course “Digital Logic and Design (DLD)”. While teaching CA, I realized that students are weak at Number Systems, and they should have spent enough time on it while taking DLD course. Therefore, when I was given the task of redesigning DLD, I planned to enforce students to practice more with number systems. I also decided to include the concept of Number Systems in the lab.&lt;/p>
&lt;figure id="figure-figure-b1-hu-dld-labs-tools-a-practice-session-b-exercise-to-convert-given-binary-number-into-any-other-format">
&lt;a data-fancybox="" href="https://www.hasanbaig.com/trainings/hu-dld-lab-2019/FigureB1_hua943a38793da2d69446b90b5ff7971c5_276968_2000x2000_fit_lanczos_2.png" data-caption="Figure B1. HU DLD Labs tools. (a) Practice session. (b) Exercise to convert given binary number into any other format.">
&lt;img data-src="https://www.hasanbaig.com/trainings/hu-dld-lab-2019/FigureB1_hua943a38793da2d69446b90b5ff7971c5_276968_2000x2000_fit_lanczos_2.png" class="lazyload" alt="" width="855" height="481">
&lt;/a>
&lt;figcaption>
Figure B1. HU DLD Labs tools. (a) Practice session. (b) Exercise to convert given binary number into any other format.
&lt;/figcaption>
&lt;/figure>
&lt;p>To give students a “flavor” of “experimenting” with the Number Systems, I developed a software which:&lt;/p>
&lt;ul>
&lt;li>First, enforce students to practice with Number Systems, at least for 25 minutes (this setting could be changed with instructor credentials). The number of questions students attempt are recorded and can be verified by instructors or lab assistants (Figure B1(a)).&lt;/li>
&lt;li>Next the students are given interactive exercises, which generates the questions randomly and verify the answer provided by students (Figure B1(b)).&lt;/li>
&lt;li>In the end, software also generates a PDF report containing all the questions attempted by student with their answers labelled as “correct” or “wrong”.&lt;/li>
&lt;/ul></description></item><item><title>Digital Logic Design</title><link>https://www.hasanbaig.com/trainings/hu-dld-2019/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-dld-2019/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Digital Electronics is at the very heart of the modern world. From smart phones to ‘Big Data’ to the electronics that controls our everyday lives, digital electronics plays a central role. An understanding of the basics of digital logic design is an essential skill for every engineer irrespective of their field of interest.&lt;/p>
&lt;p>I was a lead-instructor of this course and was asked to redesign this course as much as competitive, challenging, demanding and the best course to make it renowned as “the flagship course” of Electrical and Computer Engineering department at Habib University. I, being the lead instructor, redesigned this course from scratch in Fall 2019. There were three other instructors involved in this course but, being a leader, I enforced them to keep the lecture contents the same in all five sections. To achieve this, I took the initiative to design the slides and distribute among all other instructors. We made the course project very challenging, but the lectures and lab manuals were designed to support students in the best possible way.&lt;/p>
&lt;p>I also organized the DLD Project Exhibition and Competition (DPEC) for the very first time to appreciate students' efforts in achieving the challenging goals of the course project. Highlights of the course and DPEC 2019 can be seen in the following video.&lt;/p>
&lt;div style="position: relative; padding-bottom: 56.25%; height: 0; overflow: hidden;">
&lt;iframe src="https://www.youtube.com/embed/ED_7_Ibz96Y" style="position: absolute; top: 0; left: 0; width: 100%; height: 100%; border:0;" allowfullscreen title="YouTube Video">&lt;/iframe>
&lt;/div>
&lt;p>This DPEC has become part of my legacy and now has been organized annually ever since. The glimpses of the entire course and the DPEC are shown in the following short 2.45m video.&lt;/p>
&lt;p>Lecture slides can be downloaded from the link given above.&lt;/p></description></item><item><title>Computer Architecture</title><link>https://www.hasanbaig.com/trainings/hu-ca-2018-19/</link><pubDate>Mon, 27 Jan 2025 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-ca-2018-19/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2018, Spring 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>This course is centered around the RISC-V processor architecture. The students learn basic principles of computer architecture; how Moore&amp;rsquo;s law has traditionally helped in performance increase and the effect of impending end. They also learn the assembly language of RISC-V processor architecture and how to write programs in it. They also learn the design of a pipelined RISC-V processor. Caches, their working and their effect on program performance are also discussed.&lt;/p>
&lt;p>I developed this course from scratch and taught it twice in Fall 2018 and Spring 2019 at Habib University.&lt;/p></description></item><item><title>Embedded Systems</title><link>https://www.hasanbaig.com/trainings/hu-es-2019/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-es-2019/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>This course equip students to demonstrate their abilities to design and develop an embedded system-on-chip. The goal is to introduce students a hardware description language (HDL) which they can use to develop embedded hardware on Field Programmable Gate Array (FPGA) chips. Furthermore, they will be introduced with the architecture of an ARM Cortex processor and how a software and hardware communicate at embedded level. This understanding can help the graduates of EE/CS to become a part of a team of design engineers and developers of embedded applications in any organization. This course teaches the embedded hardware-software co-design centered around the Xilinx ZYNQ SoC device with ARM processor architecture.&lt;/p>
&lt;p>The contents of this course were developed from scratch during the Spring 2019 semester at Habib University.&lt;/p></description></item><item><title>Computer Architecture Lab</title><link>https://www.hasanbaig.com/trainings/hu-ca-lab-2018-19/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-ca-lab-2018-19/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Fall 2018, Spring 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>These labs are designed to help students develop a RISC-V processor (with reduced instruction set) throughout the semester.&lt;/p>
&lt;p>The exercises have been designed to get the students acquainted with the hardware design skills. Students learn how to design hardware using hardware description language (HDL); how to simulate an HDL design; and how to test it on a reconfigurable chip. After getting familiar with the design flow, students are required to develop processor peripherals. This give them a better idea of how different modules work in Single Cycle RISC processor and Pipelined RISC processor. Thus the knowledge gained in theory classes are reinforced.&lt;/p>
&lt;p>I also developed a software tool for students to observe on-chip data on a computer screen. The &lt;strong>software&lt;/strong> (windows installer) can be downloaded using the link shown above.&lt;/p></description></item><item><title>Computer Architecture Labs</title><link>https://www.hasanbaig.com/trainings/uconn-comparch-labs/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uconn-comparch-labs/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: University of Connecticut&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2025&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>These laboratory exercises have been designed to get students acquainted with Computer Architecture using RARS simulator. You will learn how to design hardware using MyHDL – a python library to design hardware with python. You will learn how to create and simulate your design. After getting familiarity with the tool and developing some basic processor components, you will learn how to develop and implement a single cycle processor at the end.&lt;/p>
&lt;p>I also developed a software tool for students to help them practice with Number Systesm. The &lt;strong>software&lt;/strong> can be downloaded using the link shown above.&lt;/p></description></item><item><title>Embedded Systems Lab</title><link>https://www.hasanbaig.com/trainings/hu-es-lab-2019/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-es-lab-2019/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>The basic aim of this laboratory exercises is to get the students acquainted with the embedded systems development skills targeted on FPGA along with ARM Cortex processors. Students learn how to design hardware using hardware description language (Verilog HDL); how to simulate their design; and how to test it on a reconfigurable FPGA chip. In first few labs, they learn how to develop hardware using Verilog HDL and verify the functionality using ModelSim® simulator. In next phase, they learn how to synthesize and implement HDL designs on a targeted platform. In last few labs, they spend time writing embedded software application on an ARM processor (embedded on an FPGA chip), and learn how to integrate it with on-chip hardware. Students also learn how to debug hardware, integrate custom IPs. The experiments are performed on Xilinx ZedBoard.&lt;/p></description></item><item><title>Data Structures and Algorithms</title><link>https://www.hasanbaig.com/trainings/hu-dsa-2018/</link><pubDate>Wed, 30 May 2018 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-dsa-2018/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2018&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>The objective of this course is to give students a programming intensive experience of commonly used data structures and algorithms to solve problems of moderate complexity. The data structures covered during the course include Stacks, Queues, Dictionaries, Trees, and Graphs. Various algorithms or algorithmic techniques are also introduced that include Searching, Sorting, Tree/Graph traversals, and Divide-and-conquer. The course also expose students to the basics of algorithmic complexity analysis and introduces O-notation and Master Theorem to assess and compare the performance of different algorithms.&lt;/p></description></item><item><title>Computer Organization and Assembly Programming</title><link>https://www.hasanbaig.com/trainings/uqu-cao-2013/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/uqu-cao-2013/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Umm Al Qura University&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2013&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>I taught this course to a group of students with limited proficiency in English, and I was informed that male students, in particular, often felt less motivated to engage with the subject. This presented a significant challenge, but I was able to spark their interest using a variety of pedagogical techniques and an inductive teaching approach grounded in real-world examples. I believe students are more motivated to learn theoretical concepts when they perceive a practical need for them—hence, I emphasized the application of theoretical knowledge in real-life contexts.&lt;/p>
&lt;p>To address concerns about student performance, I implemented a motivational strategy by initially assigning full marks to all students, framing it as their responsibility to maintain those grades throughout the semester. Additionally, I developed a custom software application (screenshot shown below) that allowed students to track their progress online. This visibility encouraged consistent effort, as students were motivated not to let their grade trajectories decline. The course received very positive feedback from the students.&lt;/p>
&lt;figure id="figure-figure-a1-an-pedagogical-technique-to-keep-students-active-and-work-hard-in-class">
&lt;a data-fancybox="" href="https://www.hasanbaig.com/trainings/uqu-cao-2013/FigureA1_hua34ae4faa6c16bb0aa30168c1dcb3cad_389989_2000x2000_fit_lanczos_2.png" data-caption="Figure A1. An pedagogical technique to keep students active and work hard in class.">
&lt;img data-src="https://www.hasanbaig.com/trainings/uqu-cao-2013/FigureA1_hua34ae4faa6c16bb0aa30168c1dcb3cad_389989_2000x2000_fit_lanczos_2.png" class="lazyload" alt="" width="518" height="525">
&lt;/a>
&lt;figcaption>
Figure A1. An pedagogical technique to keep students active and work hard in class.
&lt;/figcaption>
&lt;/figure></description></item><item><title>Data Structures and Algorithms Lab</title><link>https://www.hasanbaig.com/trainings/hu-dsa-lab-2018/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/hu-dsa-lab-2018/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: Spring 2018&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>The objective of this course is to give students a programming intensive experience of commonly used data structures and algorithms (DSA) to solve problems of moderate complexity. Students implement the data structures using Python programming language. The DSA covered during the course include Stacks, Queues, Dictionaries, Trees, and Graphs. Various algorithms or algorithmic techniques are also introduced that include Searching, Sorting, Tree/Graph traversals, Divide-and-conquer, etc&lt;/p></description></item><item><title>D-VASim Workshop</title><link>https://www.hasanbaig.com/trainings/workshop-dvasim-2019/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/workshop-dvasim-2019/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Habib University&lt;br>
&lt;strong>Offered in&lt;/strong>: August 16 - 23, 2019&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>One week training workshop given to students working on the enhancement of D-VASim (Dynamic Virtual Analyzer and Simulator). This workshop focused on the development part of timing and threshold value analysis.&lt;/p>
&lt;p>I co-supervised a graduate student from Chosun University, South Korea, who worked on the parallelization of the algorithm to determine threshold value and propagation delay of genetic logic circuit models. This workshop was arranged specifically for his training purpose, while some other interested undergraduate students also participated in it.&lt;/p>
&lt;h3 id="brief-overview-of-the-contents-covered">Brief overview of the contents covered&lt;/h3>
&lt;ul>
&lt;li>Introduction of DVASim&lt;/li>
&lt;li>Brief introduction of LabVIEW&lt;/li>
&lt;li>Architecture of DVASim&lt;/li>
&lt;li>Understanding threshold value and timing algorithms&lt;/li>
&lt;li>Testing of models&lt;/li>
&lt;/ul></description></item><item><title>Partial Reconfiguration Design Flow using PlanAhead - A Jump Start</title><link>https://www.hasanbaig.com/trainings/workshop-prflow-2011/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/workshop-prflow-2011/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Chosun University, South Korea.&lt;br>
&lt;strong>Offered in&lt;/strong>: October 11, 2011.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>This workshop introduced, to graduate students and researchers, the flow of designing partially reconfigurable embedded systems using Xilinx Virtex-5 FPGA platform.&lt;/p>
&lt;p>The workshop was attended by ~15 graduate students, researchers and a faculty member. The workshop material can be downloaded from the link given below.&lt;/p>
&lt;h3 id="brief-overview-of-the-contents-covered">Brief overview of the contents covered&lt;/h3>
&lt;ul>
&lt;li>Introduction&lt;/li>
&lt;li>Understanding Partial Reconfiguration (PR)&lt;/li>
&lt;li>Benefits of PR&lt;/li>
&lt;li>Types of PR&lt;/li>
&lt;li>Learn PR Terminologies&lt;/li>
&lt;li>Understand PR Technology&lt;/li>
&lt;li>PR Design Flow&lt;/li>
&lt;li>Introduction to PlanAhead for PR with practical example&lt;/li>
&lt;li>Understand the steps involved in the development of partially reconfigurable design&lt;/li>
&lt;li>Basic PR Design Considerations&lt;/li>
&lt;/ul>
&lt;p>&lt;strong>Note:&lt;/strong> Design files are password protected. Send me an email at &lt;code>hasan.baig(at)hotmail.com&lt;/code> to retrieve the password.&lt;/p></description></item><item><title>LabVIEW Workshop 2009</title><link>https://www.hasanbaig.com/trainings/workshop-labview-2009/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/workshop-labview-2009/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: NED University of Engg. &amp;amp; Technology, Pakistan.&lt;br>
&lt;strong>Offered in&lt;/strong>: February 12 and 14, 2009.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Two-sessions workshop organized by the IEEE branch at NEDUET. In this workshop, students were first introduced with basic concepts of programming in LabVIEW, followed by some advanced concepts including image acquisition, data acquisition from NI hardware modules etc. This workshop was attended by the students and faculty members of 5 different departments of engineering and a total of about 105 people.&lt;/p>
&lt;p>The video lecture of the first session of this workshop, available in Urdu/Hindi language, can be accessed from the link given above.&lt;/p>
&lt;p>I received a Letter of Gratitude from IEEE NEDUET branch on this effort.&lt;/p></description></item><item><title>LabVIEW Workshop 2008</title><link>https://www.hasanbaig.com/trainings/workshop-labview-2008/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/workshop-labview-2008/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: NED University of Engg. &amp;amp; Technology, Pakistan.&lt;br>
&lt;strong>Offered in&lt;/strong>: 17th and 24th April, 2008&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Two-sessions workshop conducted for undergrad students which gives them a quick start to develop programs in LabVIEW. It was organized by the Department of Electronic Engineering at NEDUET.&lt;/p>
&lt;p>I conducted this workshop (when I was in the third year of undergrad studies) for my fellow colleagues. The workshop was attended by ~35 undergrad students including those who were senior than me back then.&lt;/p>
&lt;h3 id="brief-overview-of-the-contents-covered">Brief overview of the contents covered&lt;/h3>
&lt;p>• Introduction of LabVIEW
• Virtual Instruments
• Studying Boolean Switches, While Loops and Waveform Charts
• Using a Virtual Instrument as a Sub Virtual Instrument
• Working with For Loops, Shift Registers and Case Structures
• Flat and Stacked Sequence Structures
• Familiarization with Arrays and Waveform Graphs
• Building text programming logic and accessing the MATLAB Scripts
• Communication with Parallel Port
• Communication with Serial Port
• Using Multisim for integrated circuit simulation and verification&lt;/p></description></item><item><title>FPGA Workshop</title><link>https://www.hasanbaig.com/trainings/workshop-fpga-2010/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/workshop-fpga-2010/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Chosun University, South Korea.&lt;br>
&lt;strong>Offered in&lt;/strong>: November 03, 2010.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Three hours hands-on workshop on FPGA which gives students a quick push to start developing applications on FPGAs. The workshop targeted Xilinx XUP V5 platform. The design workflow can be used to program any other platform.&lt;/p>
&lt;p>The workshop was attended by ~10 graduate students, researchers and a faculty member. The workshop material can be downloaded from the link given below.&lt;/p>
&lt;h3 id="brief-overview-of-the-contents-covered">Brief overview of the contents covered&lt;/h3>
&lt;ul>
&lt;li>Introduction to Programmable Logic&lt;/li>
&lt;li>Categories of Logic Devices&lt;/li>
&lt;li>Types of Logic Devices&lt;/li>
&lt;li>Comparison between CPLDs and FPGAs&lt;/li>
&lt;li>Evolution of CAD Tools and HDLs&lt;/li>
&lt;li>Selection of suitable HDL&lt;/li>
&lt;li>Understanding FPGA design flow with practical example&lt;/li>
&lt;li>Practical experiment on digital designing&lt;/li>
&lt;li>Understanding Stimulus (or testbench)&lt;/li>
&lt;li>Hands-on CAD tool for design, compilation and verification&lt;/li>
&lt;li>Hands-on CAD tools for Synthesizing, I/O Planning, Implementation and Programming the target device&lt;/li>
&lt;/ul></description></item><item><title>LabVIEW and Hardware Interfacing</title><link>https://www.hasanbaig.com/trainings/training-skilltech-2010/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/training-skilltech-2010/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Skilltech International, Pakistan.&lt;br>
&lt;strong>Offered in&lt;/strong>: June 01 - 30, 2010.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Conducted 16 Hours course work on “Virtual Instrumentation and Simulation” in the institute “Skilltech International” that is driven by Ministry of Industry, Pakistan.&lt;/p></description></item><item><title>NI Hardware Modules Training</title><link>https://www.hasanbaig.com/trainings/training-nimodules-2008/</link><pubDate>Thu, 30 May 2019 00:00:00 +0000</pubDate><guid>https://www.hasanbaig.com/trainings/training-nimodules-2008/</guid><description>&lt;p>&lt;strong>Role&lt;/strong>: Instructor.&lt;br>
&lt;strong>Institute&lt;/strong>: Instrumentation Center, NED University of Engg. &amp;amp; Technology, Pakistan.&lt;br>
&lt;strong>Offered in&lt;/strong>: June 28 and July 01, 2008.&lt;/p>
&lt;h3 id="about">About:&lt;/h3>
&lt;p>Conducted a Two-session training (for the staff of Instrumentation Center) on handling NIPXI-6229, NISCXI-1112,1162 and 1124.&lt;/p></description></item></channel></rss>