Institute: Habib University
Offered in: Fall 2018, Spring 2019
This course is centered around the RISC-V processor architecture. The students learn basic principles of computer architecture; how Moore’s law has traditionally helped in performance increase and the effect of impending end. They also learn the assembly language of RISC-V processor architecture and how to write programs in it. They also learn the design of a pipelined RISC-V processor. Caches, their working and their effect on program performance are also discussed.
I developed this course from scratch and taught it twice in Fall 2018 and Spring 2019 at Habib University.