User-friendly software interface to understand on-chip signals.
A fault-tolerant design of a RISC-V processor on FPGA.
A Self-Repairing bio-Inspired fault-Tolerant FPGA architecture with improved reliability and low area-overhead as compared to previous methodologies.
Performance comparison of image processing algorithm on CPU and GPU.
Experimentation of on-chip speed variations through dynamic partial reconfiguration on two same FPGAs.
A complete synthesizable RTL core of USB 3.0 memory device.
Designing and development of a dual-channel NAND flash data storage device.
A collection of smaller academic and instructional projects developed across courses, labs, and mentoring activities.
An cost effective solution to detect and remove defective tablets through an automated process.
Cost effective GSM-based security system using LabVIEW.